The rule of thumb to use a 0.1-µF capacitor on the power pin of a semiconductor device is rapidly fading away. Semiconductor products of today have multiple power pins and voltages. But, it is more ...

In “Know the sometimes-surprising interactions in modelling a capacitor-bypass network” (abbreviated to “Know the…” when referred to here), Tamara Schmitz of Intersil and I provided some simulation ...

Most ICs need to be decoupled from their power supply, usually with a 0.1uF capacitor between each power pin and ground. Decoupling is usually used to remove noise and to smooth power fluctuations.

Noise management, induced by digital circuits on a p. c. board assembly, deserves the attention of power supply designers and those mastering digital, analog, and mixed-mode application problems ...

This white paper discusses a method for driving high-frequency sinusoidal ripple over capacitive loads for power supply rejection ratio (PSRR) testing, an important performance parameter for many ...

The CC-100 IP is a Hyper-decoupling capacitor with a Capacitance Multiplication, Series Inductance Nullification, Cybersecurity Enhancement and an Ene ...

Greater system complexity and ever-higher clock speeds continue to push IC power consumption to the limit. And though every generation escalates the demand on IC current, voltage levels drop due to ...

Everyone knows that the perfect capacitor to decouple the power rails around ICs is a 100 nF ceramic capacitor or equivalent, yet where does this ‘fact’ come from and is it even correct? These are the ...