Nasdaq

GBT’s Automatic Generation of Integrated Circuits Layout Blocks (IP) Patent, Received a Notice of Allowance, Expected To Be Granted In The Next Upcoming Months

SAN DIEGO, May 16, 2023 (GLOBE NEWSWIRE) -- GBT Technologies Inc. (OTC PINK: GTCH) (“GBT” or the “Company”), received a notice of allowance from the United States Patent and Trademark Office with ...
EurekAlert!

High performance integrated photonic circuit based on inverse design method

A new publication from Opto-Electronic Advances; DOI https://doi.org/10.29026/oea.2022.210061 discusses high performance integrated photonic circuit based on inverse ...
Nasdaq

GBT is Developing an EDA Technology For Automatic Generation of Integrated Circuits Layout IPs

SAN DIEGO, Sept. 28, 2021 (GLOBE NEWSWIRE) -- GBT Technologies Inc. (OTC PINK: GTCH ) ("GBT” or the “Company”), is developing EDA (Electronic Design Automation) software technology to automate the ...
Semiconductor Engineering

Managing Complexity: Evolving Approaches To Design Rule Checking In Modern IC Design

As integrated circuit (IC) designs have grown in complexity, scale and speed requirements, design rule checking (DRC) has evolved from a routine step into a critical pillar of successful tapeouts.